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Author Sakurai, R. ♦ Takahashi, M. ♦ Kay, A. ♦ Yamada, A. ♦ Fujimoto, T. ♦ Kambe, T.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1999
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations
Subject Keyword Hardware ♦ Circuit synthesis ♦ Scheduling ♦ Algorithm design and analysis ♦ Yarn ♦ Costs ♦ Large-scale systems ♦ Control system synthesis ♦ Timing ♦ Clocks
Abstract In this paper, we propose a scheduling method for synchronous communication between threads in the Bach hardware compiler. In this method, all communications are extracted from a behavioral Bach-C description and statically prescheduled to synchronize communications between threads if possible. Then all the operations and communications of each thread are synthesized independently according to the prescheduling result. Consequently, we can synthesize large system LSIs efficiently, because we do not need to synthesize the whole system descriptions at once to synchronize communications. Experimental results show that our method improves throughput of synthesized circuits and is applicable to large systems designed with the Bach hardware compiler.
Description Author affiliation: Design Technol. Dev. Center, Sharp Corp., Nara, Japan (Sakurai, R.)
ISBN 078035012X
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1999-01-21
Publisher Place Hong Kong
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 349.19 kB
Page Count 4
Starting Page 193
Ending Page 196


Source: IEEE Xplore Digital Library