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Author Aragon, J. L. ♦ Nicolaescu, D. ♦ Veidenbaum, A. ♦ Badulescu, A.-M.
Sponsorship EDAA, EDA Consortium, IEEE Comput. Soc. TTTC ♦ IEEE Comput. Soc. DATC ♦ ECSI ♦ ACM/SIGDA ♦ RAS
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2004
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Energy efficiency ♦ Energy consumption ♦ Clocks ♦ Proposals ♦ Computer aided instruction ♦ Embedded computing ♦ Computer aided manufacturing ♦ CADCAM ♦ Random access memory ♦ Frequency
Abstract This paper proposes a low-energy solution for CAM-based highly associative I-caches using a segmented word-line and a predictor-based instruction fetch mechanism. Not all instructions in a given I-cache fetch are used due to branches. The proposed predictor determines which instructions in a cache access will be used and does not fetch any other instructions. Results show an average I-cache energy savings of 44% over the baseline case and 6% over the segmented case with no negative impact on performance.
Description Author affiliation: Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA (Aragon JL; Nicolaescu, D.; Veidenbaum, A.; Badulescu, A.-M.)
ISBN 0769520855
ISSN 15301591
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2004-02-16
Publisher Place France
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 197.72 kB
Page Count 2
Starting Page 1374
Ending Page 1375

Source: IEEE Xplore Digital Library