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Author Yang Li ♦ Sakiyama, K. ♦ Batina, L. ♦ Nakatsu, D. ♦ Ohta, K.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2010
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Analysis of variance ♦ Application specific integrated circuits ♦ Hardware ♦ Energy consumption ♦ Security ♦ Cryptography ♦ Costs ♦ Prototypes ♦ Signal analysis ♦ Software prototyping ♦ Masking ♦ Side Channel Attacks ♦ Variance ♦ RSL
Abstract To obtain a better trade-off between cost and security, practical DPA countermeasures are not likely to deploy full masking that uses one distinct mask bit for each signal. A common approach is to use the same mask on several instances of an algorithm. This paper proposes a novel power analysis method called Power Variance Analysis (PVA) to reveal the danger of such implementations. PVA uses the fact that the side-channel leakage of parallel circuits has a big variance when they are given the same but random inputs. This paper introduces the basic principle of PVA and a series of PVA experiments including a successful PVA attack against a prototype RSL-AES implemented on SASEBO-R.
Description Author affiliation: The University of Electro-Communications, Tokyo, Japan (Yang Li; Sakiyama, K.; Nakatsu, D.; Ohta, K.) || Radboud University Nijmegen, The Netherlands (Batina, L.)
ISBN 9781424470549
ISSN 15301591
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2010-03-08
Publisher Place Germany
Rights Holder European Design Automation Association (EDAA)
e-ISBN 9783981080162
Size (in Bytes) 1.51 MB
Page Count 6
Starting Page 1059
Ending Page 1064


Source: IEEE Xplore Digital Library