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Author Damiani, M. ♦ De Micheli, G.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1992
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations
Subject Keyword Difference equations ♦ Logic circuits ♦ Registers ♦ Circuit synthesis ♦ Counting circuits ♦ Network synthesis ♦ Synchronous machines ♦ Circuit testing ♦ Optimization methods ♦ Measurement
Abstract The authors present a formulation for the problem of optimizing synchronous logic across register boundaries. They describe the degrees of freedom that are the don't-care conditions of an embedded subnetwork by means of sets of execution traces, described implicitly by synchronous recurrence equations. The optimization problem reduces to that of finding minimum-cost solutions to such equations. An exact solution algorithm for this problem is presented, along with approximations that improve its computational efficiency. The feasibility and effectiveness of the approach were demonstrated on synchronous benchmark circuits.<<ETX>>
Description Author affiliation: Center for Integrated Syst., Stanford Univ., CA, USA (Damiani, M.; De Micheli, G.)
ISBN 0818628227
ISSN 0738100X
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1992-06-08
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 471.59 kB
Page Count 6
Starting Page 556
Ending Page 561


Source: IEEE Xplore Digital Library