Access Restriction

Author Higami, Y. ♦ Takamatsu, Y. ♦ Saluja, K.K. ♦ Kinoshita, K.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1999
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Circuit faults ♦ Circuit simulation ♦ Sequential circuits
Abstract This paper presents fault simulation techniques for selecting a small number of IDDQ measurement vectors from a given test sequence while maintaining the original fault coverage. The proposed method covers a class of bridging faults and uses parallel fault simulation wherever possible. Experimental results are presented to demonstrate the effectiveness of the proposed method.
Description Author affiliation: Ehime Univ., Matsuyama, Japan (Higami, Y.)
ISBN 0769503152
ISSN 10817735
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1999-11-18
Publisher Place China
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 226.84 kB
Page Count 6
Starting Page 141
Ending Page 146

Source: IEEE Xplore Digital Library