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Author Ho, P.W.C. ♦ Almurib, H.A.F. ♦ Kumar, T.N.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2015
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Memristors ♦ CMOS integrated circuits ♦ Latches ♦ Switches ♦ Nonvolatile memory ♦ Inverters ♦ Transistors ♦ latch ♦ Sequential logic circuit ♦ memristor
Abstract This work presents the circuit level design of a non-volatile D-latch (NVDL) using memristor that retains the stored data in the event of power interruption. The programming complexity of proposed NVDL, unlike previous NV latches, is simplified. The proposed NVDL is designed using 32nm node and results are compared with the volatile CMOS based D-latch. Simulation results show that the proposed NVDL is more energy efficient than the CMOS based volatile D-latch. The energy required by NVDL to store or retrieve the data is 1.5 times lesser than the CMOS based D-latch. In addition, the NVDL switching speed is increased by 1.54 times when compared with previous NV latches design.
Description Author affiliation: Dept. of Electr. & Electron. Eng., Univ. of Nottingham Malaysia Campus, Semenyih, Malaysia (Ho, P.W.C.; Almurib, H.A.F.; Kumar, T.N.)
ISBN 9781479986392
ISSN 21593450
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2015-11-01
Publisher Place China
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
e-ISBN 9781479986415
Size (in Bytes) 660.27 kB
Page Count 4
Starting Page 1
Ending Page 4


Source: IEEE Xplore Digital Library