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Author Habibi, A. ♦ Moinudeen, H. ♦ Tahar, S.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2006
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Automata ♦ Object oriented modeling ♦ Algorithm design and analysis ♦ System testing ♦ Hardware ♦ Distributed power generation ♦ Embedded system ♦ Proposals ♦ Performance evaluation ♦ System-on-a-chip
Abstract SystemC is a system level language proposed to raise the abstraction level for embedded systems design and verification. In this paper, we propose to generate finite state machines (FSM) from SystemC designs using two algorithms originally proposed for the generation of FSM from abstract state machines (ASM). This proposal enables the integration of SystemC with existing tools for test case generation from FSM. Hence, enabling two important applications: (1) using the FSM graph structure to produce test suites allowing functional testing of SystemC designs; and (2) performing conformance testing, where the FSM serves as a precise model of the observable behavior of the system used to validate lower abstraction levels of the design (e.g., register transfer level (RTL))
Description Author affiliation: Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que. (Habibi, A.; Moinudeen, H.; Tahar, S.)
ISBN 3981080114
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2006-03-06
Publisher Place Germany
Rights Holder European Design Automation Association (EDAA)
Size (in Bytes) 127.90 kB
Page Count 6
Starting Page 1
Ending Page 6


Source: IEEE Xplore Digital Library