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Author Karathanasis, H.C. ♦ Frantzeskakis, E.N. ♦ Karathanasis, I.C. ♦ Birbas, A.N.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1994
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Circuits ♦ Very large scale integration ♦ Read only memory ♦ Arithmetic ♦ Clocks ♦ Adders ♦ Throughput ♦ Table lookup ♦ Algorithm design and analysis ♦ Symmetric matrices
Abstract We first present a digit-serial circuit with minimized ROM requirements, for implementing rotations. Except for being area efficient, this circuit can outperform bit-parallel rotation implementations in terms of throughput, if used in conjuction with the technique of computation unfolding. Next, we present applications of this rotation circuit in VLSI processors for the fast Fourier transform (FFT), the discrete cosine transform (DCT), the discrete sine transform (DST), and the modulated lapped transform (MLT).<<ETX>>
Description Author affiliation: INTRACOM S.A., Peania Attica, Greece (Karathanasis, H.C.; Frantzeskakis, E.N.)
ISBN 0818664304
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1994-09-08
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 407.95 kB
Page Count 7
Starting Page 499
Ending Page 505


Source: IEEE Xplore Digital Library