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Author Ghatraju, L. ♦ Abd-El-Barr, M.H. ♦ McCrosky, C.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1994
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations
Subject Keyword High level synthesis ♦ Digital circuits ♦ Circuit synthesis ♦ Hardware design languages ♦ Integrated circuit synthesis ♦ Sequential circuits ♦ Logic ♦ Design automation ♦ Algorithm design and analysis ♦ Genetic mutations
Abstract A technique for the synthesis of two-level and nested logic from recursive behavioral specifications is presented. The two-level circuits derived are optimal (up to product term sharing). Different specifications of the same function always yield the same hardware. Any recursive first-order function can be synthesized without a stack /spl minus/ no other high-level synthesis systems have demonstrated this capability. The technique is extended to synthesize circuits for a wide range of sequential circuits. The formal techniques used are based on domain theory and "frontiers" algorithms.<<ETX>>
Description Author affiliation: Dept. of Comput. Sci., Saskatchewan Univ., Saskatoon, Sask., Canada (Ghatraju, L.; Abd-El-Barr, M.H.; McCrosky, C.)
ISBN 0818654104
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1994-02-28
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 488.62 kB
Page Count 5
Starting Page 94
Ending Page 98

Source: IEEE Xplore Digital Library