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Author Castrillon, J. ♦ Velasquez, R. ♦ Stulova, A. ♦ Weihua Sheng ♦ Jianjiang Ceng ♦ Leupers, R. ♦ Ascheid, G. ♦ Meyr, H.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2010
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Simultaneous localization and mapping ♦ Performance analysis ♦ Computational modeling ♦ Parallel programming ♦ Computer networks ♦ Concurrent computing ♦ Programming environments ♦ Program processors ♦ Analytical models ♦ Processor scheduling
Abstract Nowadays, most embedded devices need to support multiple applications running concurrently. In contrast to desktop computing, very often the set of applications is known at design time and the designer needs to assure that critical applications meet their constraints in every possible use-case. In order to do this, all possible use-cases, i.e. subset of applications running simultaneously, have to be verified thoroughly. An approach to reduce the verification effort, is to perform composability analysis which has been studied for sets of applications modeled as Synchronous Dataflow Graphs. In this paper we introduce a framework that supports a more general parallel programming model based on the Kahn Process Networks Model of Computation and integrates a complete MPSoC programming environment that includes: compiler-centric analysis, performance estimation, simulation as well as mapping and scheduling of multiple applications. In our solution, composability analysis is performed on parallel traces obtained by instrumenting the application code. A case study performed on three typical embedded applications, JPEG, GSM and MPEG-2, proved the applicability of our approach.
Description Author affiliation: Institute for Integrated Signal Processing Systems (ISS), RWTH Aachen University, Germany (Castrillon, J.; Stulova, A.; Weihua Sheng; Jianjiang Ceng; Leupers, R.; Ascheid, G.; Meyr, H.) || ALaRI Institute, Lugano, Switzerland (Velasquez, R.)
ISBN 9781424470549
ISSN 15301591
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2010-03-08
Publisher Place Germany
Rights Holder European Design Automation Association (EDAA)
e-ISBN 9783981080162
Size (in Bytes) 413.79 kB
Page Count 6
Starting Page 753
Ending Page 758


Source: IEEE Xplore Digital Library