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Author Song, O. ♦ Menon, P.R.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1990
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Circuit faults ♦ Circuit simulation ♦ Combinational circuits ♦ Fault diagnosis ♦ Computational modeling ♦ Electrical fault detection ♦ Circuit testing ♦ Fault detection ♦ Pattern analysis ♦ Concurrent computing
Abstract Significant improvements in the speed of fault simulation of combinational circuits have been achieved by combining parallel pattern simulation of the fault-free circuit with tracing-based methods for identifying detected faults. The authors propose a method of reducing the expense of backtracing by identifying lines where backtracking may be stopped, and they show its efficiency through an experiment with a set of benchmark circuits. The proposed method has been implemented in the C language on a VAX 6210/VMS which has a machine word of 32 b. Thirty-two patterns are processed in parallel during true-value simulation, backtracing, and stem analysis. Calculations of the sensitivity, stem-criticality, and checkup vectors are performed by vector operations when each line is reached during first backtracing. The results indicate that the proposed method is more efficient than that of K.J. Antreich and M.H. Schultz (1987) for all the benchmark circuits that were simulated.
Description Author affiliation: Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA (Song, O.; Menon, P.R.)
ISBN 081869064X
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1990-09-10
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 454.80 kB
Page Count 6
Starting Page 706
Ending Page 711


Source: IEEE Xplore Digital Library