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Author Shah, I. ♦ Akiwumi-Assani, O. ♦ Johnson, B.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1990
Language English
Subject Domain (in DDC) Natural sciences & mathematics ♦ Physics ♦ Electricity & electronics ♦ Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Image coding ♦ Pipelines ♦ Pixel ♦ Clocks ♦ Entropy coding ♦ Application specific integrated circuits ♦ Codecs ♦ DH-HEMTs ♦ Frequency ♦ Computer architecture
Abstract Two chips have been developed for lossless image compression. The first IC performs a transformation, and the second performs lossless coding. This work presents the transform and coding algorithms and the main architectural features of the chips, and outlines some performance specifications. The image compression/decompression system described reduces storage requirements in high-speed image archival and database applications and speeds the transmission of digital images over communication channels.<<ETX>>
Description Author affiliation: North American Philips Corp., Briarcliff Manor, NY, USA (Shah, I.; Akiwumi-Assani, O.; Johnson, B.)
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1990-05-13
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 262.00 kB


Source: IEEE Xplore Digital Library