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Author Harrison, S. ♦ Collins, P. ♦ Noeninckx, G.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2000
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Software testing ♦ System testing ♦ Electronic equipment testing ♦ Product design ♦ Production ♦ Inspection ♦ Design for testability ♦ Application software ♦ Design engineering ♦ Hardware
Abstract The ever-increasing product complexity and I/O density of new electronic designs has led to the need to implement IEEE Std 1149.1 'Boundary Scan' test techniques within many of the new NSS products. The standard in-circuit test techniques used in Motorola's older product designs were becoming costly to implement and unreliable in a production environment. This paper describes how Motorola NSS developed a IEEE Std 1149.1 test strategy to compliment its other inspection and test techniques. The Motorola IEEE Std 1149.1 test strategy consists of a high level of DFT, starting with component selection with application and implementation notes being generated to aid the design engineers task of implementation. The paper then progresses on to test software and hardware selection, PCB design guidelines and finally Motorola's future direction in a system wide IEEE Std 1149.1 test strategy.
Description Author affiliation: Motorola Inc., USA (Harrison, S.)
ISBN 0780365461
ISSN 10893539
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2000-10-05
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 888.29 kB
Page Count 10
Starting Page 45
Ending Page 54


Source: IEEE Xplore Digital Library