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Author Ting Liu ♦ Wagner, S. ♦ Sturm, J.C.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2012
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Silicon ♦ Temperature measurement ♦ Threshold voltage ♦ Thin film transistors ♦ Degradation ♦ Logic gates ♦ Current measurement
Abstract Highly stable a-Si TFTs reported recently with extremely long operating lifetimes under DC gate bias are attractive for analog drivers of the OLEDs in AMOLED displays [1]. At room temperature, the time for the DC saturation current to drop to 50% is predicted to be 100 to 1,000 years. However, the lifetimes were extrapolated with a stretched-exponential model for defect creation in a-Si, based on only month-long room temperature tests. In this study, we present a two-stage threshold voltage shift model for lifetime prediction from temperature dependent measurements. We find that (i) a “unified stretched exponential fit” models the drain current degradation from 60°C to 140°; and (ii) there is a second instability mechanism that initially dominates up to hours or days at low temperatures, so that tests conducted only at room temperature may not predict lifetime accurately.
Description Author affiliation: Princeton Institute for the Science and Technology of Materials (PRISM), Princeton University, NJ 08544 USA (Ting Liu; Wagner, S.; Sturm, J.C.)
ISBN 9781467311632
ISSN 15483770
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2012-06-18
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
e-ISBN 9781467311649
Size (in Bytes) 636.80 kB
Page Count 2
Starting Page 245
Ending Page 246


Source: IEEE Xplore Digital Library