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Author Huang, C. ♦ Young, C. ♦ Liu, H. ♦ Tzou, S.F. ♦ Tsui, D. ♦ Tsai, A. ♦ Chang, E.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2007
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Production ♦ Inspection ♦ Etching ♦ Sampling methods ♦ Monitoring ♦ Process design ♦ Random access memory ♦ Data mining ♦ Design methodology ♦ Metrology
Abstract For advanced device (45 nm and below), we proposed a novel method to monitor systematic and random excursion. By integrating design information and defect inspection results into automated software (DBB), we can identify design/process marginality sites with defect inspection tool. In this study, we applied supervised binning function (DBC) and defect criticality index (DCI) to identify systematic and random excursion problems on 45 nm SRAM wafers. With established SPC charts, we will be able to detect future excursion problem in manufacturing line early.
Description Author affiliation: United Microelectron. Corp., Tainan (Huang, C.)
ISBN 9781424411412
ISSN 1523553X
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2007-10-15
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 1.98 MB
Page Count 3
Starting Page 1
Ending Page 3


Source: IEEE Xplore Digital Library