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Author Yilmaz, M. ♦ Chakrabarty, K. ♦ Tehranipoor, M.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2008
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Integrated circuit interconnections ♦ Crosstalk ♦ Delay effects ♦ Circuit faults ♦ Automatic test pattern generation ♦ Contracts ♦ Circuit testing ♦ Power engineering computing ♦ Power engineering and energy ♦ Integrated circuit noise
Abstract Timing-related failures in high-performance integrated circuits are being increasingly dominated by small-delay defects (SDDs). Such delay faults are caused by process variations, crosstalk, power-supply noise, and defects such as resistive shorts and opens. Recently, the concept of output deviations has been presented as a surrogate long-path coverage metric for SDDs. However, this approach is focused only on delay variations for logic gates and it ignores chip layout, interconnect defects, and delay variations on interconnects. We present a layout-aware output deviations metric that can easily handle interconnect delay variations. Experimental results show that interconnect-delay variations can have a significant impact on the long paths that must be targeted for the detection of SDDs. For the same pattern count, the proposed pattern-grading and pattern-selection method is more effective than a commercial timing-aware ATPG tool for SDDs, and requires considerably less CPU time.
Description Author affiliation: Dept. Electr. & Comput. Eng., Univ. of Connecticut, Storrs, CT (Tehranipoor, M.) || Dept. Electr. & Comput. Eng., Duke Univ., Durham, NC (Yilmaz, M.; Chakrabarty, K.)
ISBN 9781424424023
ISSN 10893539
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2008-10-28
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 722.79 kB
Page Count 10
Starting Page 1
Ending Page 10


Source: IEEE Xplore Digital Library