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Author Hao, H. ♦ McCluskey, E.J.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1993
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Logic testing ♦ CMOS logic circuits ♦ Circuit testing ♦ Voltage ♦ CMOS technology ♦ Hot carriers ♦ Power supplies ♦ Electrical fault detection ♦ Fault detection ♦ Circuit faults
Abstract In this paper we propose a very-low-voltage (VLV) testing technique for CMOS logic ICs. Voltage dependence of CMOS logic circuit operation in the presence of resistive shorts and hot carrier damage is studied. It is shown that at certain much-lower-than-normal power supply voltage, weak CMOS logic ICs due to the presence of these flaws can be forced to malfunction while truly good ICs continue to function. Very-low-voltage testing also detects pattern dependent faults caused by resistive shorts. Because of its simplicity and because there is no overhead associated with it, very-low-voltage testing can easily be applied to chips and circuit boards as a production test, field test, or failure diagnosis technique.
Description Author affiliation: Dept. of Electr. Eng. & Comput. Sci., Stanford Univ., CA, USA (Hao, H.; McCluskey, E.J.)
ISBN 0780314301
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1993-10-17
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 1.01 MB
Page Count 10
Starting Page 275
Ending Page 284


Source: IEEE Xplore Digital Library