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Author Haensch, W.
Sponsorship IEEE ♦ Electron Device Soc. ♦ Nat. Sci. Found. ♦ Army Research Laboratory ♦ Naval Research Laboratory ♦ Army Research Office ♦ Nat. Inst. of Standards and Technol. ♦ Elec. and Comput. Eng. Dept., Univ. of Maryland
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2003
Language English
Subject Domain (in DDC) Natural sciences & mathematics ♦ Physics ♦ Electricity & electronics ♦ Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Silicon germanium ♦ Germanium silicon alloys ♦ CMOS technology ♦ Dielectric substrates ♦ Electron mobility ♦ MOSFETs ♦ Tensile strain ♦ Silicon on insulator technology ♦ Research and development ♦ Dielectric materials
Abstract Fabrication of sub-100 nm strained Si/SiGe MOSFETs using CMOS technology have been demonstrated, with current drives enhancements in both NFET and PFET. Material properties of strained Si and SiGe require careful modifications in CMOS process flow. Band offset induced shift in threshold voltages need to be compensated by device design and the difference in dopant diffusion properties also need to be taken into account. SGOI substrates can be fabricated by SIMOX, thermal diffusion of Ge and layer transfer techniques.
Description Author affiliation: IBM Res. Div., Thomas J. Watson Res. Center, Yorktown Heights, NY, USA (Haensch, W.)
ISBN 0780381394
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2003-12-10
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 66.45 kB

Source: IEEE Xplore Digital Library