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Author Prodanov, V. ♦ Banu, M.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2006
Language English
Subject Domain (in DDC) Natural sciences & mathematics ♦ Physics ♦ Electricity & electronics ♦ Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Clocks ♦ Very large scale integration ♦ Repeaters ♦ Jitter ♦ Delay ♦ Circuits ♦ Wires ♦ Power transmission lines ♦ Power dissipation ♦ Paper technology
Abstract Thr authors introduce a serial passive clock distribution technique allowing efficient and accurate skew removal at any arbitrary clock drop point. The passive transmission medium may be on-chip electrical transmission lines built in current IC technology or possible optical waveguides in future developments. The proposed technique is naturally insensitive to practical loses and other non ideal effects and has the capability of covering large chip areas
Description Author affiliation: MHI Consulting, LLC, New Jersey, NJ (Prodanov, V.; Banu, M.)
ISBN 1424400759
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2006-09-10
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 254.23 kB
Page Count 4
Starting Page 285
Ending Page 288


Source: IEEE Xplore Digital Library