Future electron-beam lithography and implications on design and CAD toolsFuture electron-beam lithography and implications on design and CAD tools

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 Author Chen, J.J.H. ♦ Krecinic, F. ♦ Jen-Hom Chen ♦ Chen, R.P.S. ♦ Lin, B.J. Source IEEE Xplore Digital Library Content type Text Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE) File Format PDF Copyright Year ©2011 Language English
 Subject Domain (in DDC) Technology ♦ Engineering & allied operations Subject Keyword Lithography ♦ Writing ♦ Ultraviolet sources ♦ Throughput ♦ Lifting equipment ♦ Electron beams Abstract The steeply increasing price and difficulty of masks make the mask-based optical lithography, such as ArF immersion lithography and extreme ultra-violet lithography (EUVL), unaffordable when going beyond the 32-nm half-pitch (HP) node[1]. Electron beam direct writing (EBDW), so called maskless lithography (ML2), provides an ultimate resolution without jeopardy from masks, but the extremely low productivity of the traditional single beam systems made it very laborious for mass manufacturing after over 3 decades of development. Although electron beam lithography has been long used for mask writing, it is yet very slow and typically takes from hours to days to write a complete 6-inch high-end mask. Direct writing a 300-mm wafer definitely would take much longer. Considering production efficiency in the cleanroom, the throughput of lithography tools should be in the order of 10 wafers per hour (WPH) per square meter as compared to that of an ArF scanner. To achieve such a throughput per e-beam column requires an improvement of more than 3-order. Increasing the beam current in the conventional single beam system would induce the space charge effect and thus is not a solution. Several groups [2][3][4][5] have proposed different multiple electron beam maskless lithography (MEBML2) approaches, by multiplying either Gaussian beams, variable shape beams or by using cell projections, to increase the throughput. The maturing MEMS technology and electronic control technology enable precise control of more than ten thousands or even millions of electron beamlets, writing in parallel. Without the mask constraint, the exposure can be made by continuously scanning across the entire wafer diameter as long as the ultra-high speed data rate can be supported. Hence a much slower scan speed is required and therefore a small tool footprint is achievable. A MAPPER Pre-Alpha Tool, composed of a 110-beam 5-keV column and a 300-mm wafer stage within a vacuum chamber of $1.3×1.3m^{2}$ footprint, has been installed and operational for process development in the advanced Giga-Fab cleanroom environment. By sending the pre-treated optical data to the correspondent photodiode of each blanker, each beam writes its own features independently in raster scan mode. Resolution beyond 30-nm HP resolution for both C/H and L/S by using chemical amplified resist (CAR) has been demonstrated. Applying proper E-beam proximity corrections (EPC), a 20-nm node test circuit layout has been successfully patterned. The tool will be upgraded with a new Electron-Optics column containing 13,000 beamlets and each beamlet projecting 7×7 sub-beams to achieve 10 WPH of 32-nm HP node wafers by a single chamber. The achievement of high productivity MEBML2 needs not only the beams, but also the data preparation. For a 10-WPH MEBML2 tool, one wafer exposure is done in 6 minutes. However, the pre-treatments, for example logic operation and EPC, of the huge reticle field data file typically take a few days in present-day mask writing and therefore drastic speed enhancement is required to really gain the benefits of ML2 in cycle time and flexibility. In MAPPER's writing approach, the circuit layout in GDSII or OASIS format at sub-nm addressing grid, whose file size can be up to hundreds of Giga-Bytes after EPC, has to be pre-rasterized to a bitmap writing format of 3.5-nm grid, which file size of the simple 0 and 1 bitmap for a full-26mm×33mm reticle field becomes more than 10 Tera-Bytes(TB). Real-time data decompression in the data path of the tool is designed to avoid storage and transportation of the extremely huge files. In this presentation, several suggestions regarding design, EPC and CAD tools to best fit the nature and operation of MEBML2 in high volume manufacturing are made. Because of high resolution by the e-beam, the restricted design rules due to resolution limit of the optical lithography, especially those related to the double patterning techniques, can be removed. By considering the speed of data treatment, required storage, and computing resources inside the data path, some minor rules like on-pixel design may be recommended. Although contour-based EPC has been demonstrated to meet CD requirements [6][7], hybrid EPC accompanied with dose modulation has been proposed to further enhance the imaging contrast. Even though we will optimize the tool precision to eliminate most of the beam-to-beam CD and overlay errors, it is nevertheless safer to propose some methods to avoid the BtB stitching on critical devices. Description Author affiliation: Maskless Lithography Program, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan 30077 (Chen, J.J.H.; Krecinic, F.; Jen-Hom Chen; Chen, R.P.S.; Lin, B.J.) ISBN 9781424475155 ISSN 21536961 Educational Role Student ♦ Teacher Age Range above 22 year Educational Use Research ♦ Reading Education Level UG and PG Learning Resource Type Article Publisher Date 2011-01-25 Publisher Place Japan Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE) e-ISBN 9781424475162 Size (in Bytes) 154.03 kB Page Count 2 Starting Page 403 Ending Page 404
Source: IEEE Xplore Digital Library