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Author Steensma, J. ♦ Catthoor, F. ♦ De Man, H.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1993
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations
Subject Keyword Hardware ♦ Automatic testing ♦ Controllability ♦ Throughput ♦ Costs ♦ Logic testing ♦ Test pattern generators ♦ Laboratories ♦ Signal processing ♦ Data processing
Abstract A technique for automatically adding hardware for testability is proposed. The technique is closely integrated with a symbolic test method which can deal with realistic data paths. The symbolic test technique is based on novel controllability and observability descriptions. These descriptions are also used for the testability analysis. In case of testability problems, various ways to add hardware are considered and an algorithm which finds the optimal set of hardware solutions is given.<<ETX>>
Description Author affiliation: IMEC Lab., Leuven, Belgium (Steensma, J.; Catthoor, F.; De Man, H.)
ISBN 0818634103
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1993-02-22
Publisher Place France
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 552.83 kB
Page Count 5
Starting Page 156
Ending Page 160


Source: IEEE Xplore Digital Library