Thumbnail
Access Restriction
Subscribed

Author Parvais, B. ♦ Hu, S. ♦ Dehan, M. ♦ Mercha, A. ♦ Decoutere, S.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2007
Language English
Subject Domain (in DDC) Natural sciences & mathematics ♦ Physics ♦ Electricity & electronics ♦ Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Radio frequency ♦ MOSFETs ♦ Semiconductor device modeling ♦ Immune system ♦ Resistors ♦ Integrated circuit modeling ♦ Geometry ♦ Transmission lines ♦ Solid modeling ♦ CMOS technology
Abstract A new scalable compact model for the resistive substrate network of multi-finger MOSFETs is presented. The model is based on the transmission line formalism to capture the distributed nature of the well resistance. Due to its physical foundation, the model provides a more accurate description of different layout styles over a wide range of geometries. The model is validated experimentally on a 90 nm CMOS technology and is used to determine the geometry of RF transistors that minimize the substrate resistance. The opted network topology allows a direct implementation with the PSP model.
Description Author affiliation: IMEC, Leuven (Parvais, B.)
ISBN 9781424407866
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2007-09-16
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 1.45 MB
Page Count 4
Starting Page 503
Ending Page 506


Source: IEEE Xplore Digital Library