|Source||ACM Digital Library|
|Publisher||Association for Computing Machinery (ACM)|
|Subject Domain (in DDC)||Computer science, information & general works ♦ Data processing & computer science|
|Subject Keyword||Congestion ♦ Batch arrival ♦ Constant service ♦ Queuing system ♦ Waiting times|
|Abstract||A popular means of increasing the effective rate of main storageaccesses in a large computer is a multiplicity of memory modulesaccessible in parallel. Although such an organization usuallyachieves a net gain in access rate, it also creates new modes ofcongestion at the storage controller. This paper analyzes thevariables that describe such a congestion: queue lengths anddelays. A controller that maintains separate register sets toaccommodate the request queue of each module is considered. Thevarious processors attached to the storage are assumed to generate,in each memory cycle, a number of access requests with the samegiven distribution. The addresses specified by these requests(reduced to the module index) are further assumed to follow thestates of a first-order Markov chain. The analysis then becomes oneof a single-server queuing system with constant service time andindexed batch arrival process. Results are derived for severaldescriptors of the congestion and thus of the quality of serviceoffered by such an organization. The aim throughout is to embodythe results in a form readily suitable for numericalevaluation.|
|Age Range||18 to 22 years ♦ above 22 year|
|Education Level||UG and PG|
|Learning Resource Type||Article|
|Publisher Place||New York|
|Journal||Journal of the ACM (JACM)|
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