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Author Kiasari, Abbas Eslami ♦ Jantsch, Axel ♦ Lu, Zhonghai
Source ACM Digital Library
Content type Text
Publisher Association for Computing Machinery (ACM)
File Format PDF
Copyright Year ©2013
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword System-on-chip (SoC) ♦ Analytical modeling ♦ Network-on-chip (NoC) ♦ Performance evaluation
Abstract This article reviews four popular mathematical formalisms—queueing theory, network calculus, schedulability analysis, and dataflow analysis—and how they have been applied to the analysis of on-chip communication performance in Systems-on-Chip. The article discusses the basic concepts and results of each formalism and provides examples of how they have been used in Networks-on-Chip (NoCs) performance analysis. Also, the respective strengths and weaknesses of each technique and its suitability for a specific purpose are investigated. An open research issue is a unified analytical model for a comprehensive performance evaluation of NoCs. To this end, this article reviews the attempts that have been made to bridge these formalisms.
ISSN 03600300
Age Range 18 to 22 years ♦ above 22 year
Educational Use Research
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2013-07-03
Publisher Place New York
e-ISSN 15577341
Journal ACM Computing Surveys (CSUR)
Volume Number 45
Issue Number 3
Page Count 41
Starting Page 1
Ending Page 41


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Source: ACM Digital Library