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Author Quadir, Shahed E. ♦ Chen, Junlin ♦ Forte, Domenic ♦ Asadizanjani, Navid ♦ Shahbazmohamadi, Sina ♦ Wang, Lei ♦ Chandy, John ♦ Tehranipoor, Mark
Source ACM Digital Library
Content type Text
Publisher Association for Computing Machinery (ACM)
File Format PDF
Copyright Year ©2016
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword FPGA security ♦ Reverse engineering (RE) ♦ Anti--reverse engineering (anti-RE) ♦ Delayering ♦ Firmware extraction ♦ Hardware security
Abstract The reverse engineering (RE) of electronic chips and systems can be used with honest and dishonest intentions. To inhibit RE for those with dishonest intentions (e.g., piracy and counterfeiting), it is important that the community is aware of the state-of-the-art capabilities available to attackers today. In this article, we will be presenting a survey of RE and anti-RE techniques on the chip, board, and system levels. We also highlight the current challenges and limitations of anti-RE and the research needed to overcome them. This survey should be of interest to both governmental and industrial bodies whose critical systems and intellectual property (IP) require protection from foreign enemies and counterfeiters who possess advanced RE capabilities.
Description Author Affiliation: University of Connecticut, FL, USA (Forte, Domenic; Asadizanjani, Navid; Tehranipoor, Mark); University of Connecticut, NY, USA (Shahbazmohamadi, Sina); University of Connecticut, CT, USA (Quadir, Shahed E.; Chen, Junlin; Wang, Lei; Chandy, John)
ISSN 15504832
Age Range 18 to 22 years ♦ above 22 year
Educational Use Research
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2016-04-01
Publisher Place New York
e-ISSN 15504840
Journal ACM Journal on Emerging Technologies in Computing Systems (JETC)
Volume Number 13
Issue Number 1
Page Count 34
Starting Page 1
Ending Page 34

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Source: ACM Digital Library