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Author Smith, M.J.S. ♦ Portmann, C. ♦ Anagnostopoulos, C. ♦ Tschang, P.S. ♦ Rao, R. ♦ Valdenaire, P. ♦ Ching, H.
Sponsorship IEEE Solid-State Circuits Society ♦ IEEE Electron Devices Society ♦ IEEE Circuits and Systems Society ♦ IEEE Electron Devices Society ♦ IEEE Solid-State Circuits Society ♦ IEEE Solid-State Circuits Society ♦ Japan Society of Applied Physics (JSAP) ♦ IEEE Solid-State Circuits Society ♦ IEEE Solid-State Circuits Society ♦ IEEE Microwave Theory and Techniques Society ♦ IEEE Solid-State Circuits Society ♦ IEEE San Francisco Section ♦ Bay Area Council ♦ Univ. PA ♦ IEEE
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1966
Language English
Subject Domain (in DDC) Natural sciences & mathematics ♦ Physics ♦ Electricity & electronics ♦ Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Software libraries ♦ Assembly ♦ CMOS digital integrated circuits ♦ CMOS analog integrated circuits ♦ BiCMOS integrated circuits ♦ Application specific integrated circuits ♦ CMOS integrated circuits ♦ CMOS logic circuits ♦ Analog integrated circuits ♦ Process design
Abstract Reviews the use of cell libraries and assembly tools for application-specific integrated circuits (ASIC's). To illustrate the design process the authors describe the construction of cells suitable for 1.2-3- mu m CMOS and BiCMOS IC's, and the use of silicon assembly tools for use with these libraries. The digital library discussed was developed from an existing set of 3- mu m standard cells, data-path cells, and logic macrocells which were modified and augmented with analog cells. The library is compatible with public-domain software for logic synthesis, place and route, simulation, and layout. The authors compare the use of these tools with other commercial systems suitable for mixed analog/digital CMOS IC design. Analog library construction utilizes a set of prototype tools to reduce the time spent in the design, layout, and simulation cycle. The authors compare and contrast this approach to the use of analog compilation tools to assemble analog layout directly. They review present and suggest new techniques to realize high-performance analog circuits for mixed analog/digital IC's.<<ETX>>
Description Author affiliation :: IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
ISSN 00189200
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1989-10-01
Publisher Place U.S.A.
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Volume Number 24
Issue Number 5
Size (in Bytes) 2.10 MB
Page Count 14
Starting Page 1419
Ending Page 1432


Source: IEEE Xplore Digital Library