Thumbnail
Access Restriction
Subscribed

Author Masuhara, T. ♦ Etoh, J. ♦ Nagata, M.
Sponsorship IEEE Electron Devices Society
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1963
Language English
Subject Domain (in DDC) Natural sciences & mathematics ♦ Physics ♦ Electricity & electronics ♦ Technology ♦ Engineering & allied operations ♦ Applied physics
Abstract A MOSFET model that is capable of handling the drain current above 10<sup>-10</sup>A within the temperature range of 220-340 K is proposed. The key feature of the model is that surface potentials at source and pinchoff points are used for the purpose of obtaining a smooth connection between the current solutions in the tail and the saturation regions. Comparison of the model with experiments has been carried out using n-channel MOSFET's with 7 × 10<sup>13</sup>, 7 × 10<sup>14</sup>, and 4 × 10<sup>15</sup>cm<sup>-3</sup>substrate impurity concentration and 675-, 1470-, and 5030-Å gate-oxide thickness. The theoretical calculations are in excellent agreement with the experimental measurements. It is shown that low-level current has a strong influence on the low-voltage static inverter circuit and dynamic memory.
Description Author affiliation :: Hitachi Ltd., Tokyo, Japan
ISSN 00189383
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1974-06-01
Publisher Place U.S.A.
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Volume Number 21
Issue Number 6
Size (in Bytes) 780.63 kB
Page Count 9
Starting Page 363
Ending Page 371


Source: IEEE Xplore Digital Library