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Author Lenfant, J.
Sponsorship IEEE Computer Society Technical Committee on Distributed Process ♦ IEEE Computer Society Technical Committee on VLSI ♦ IEEE Technical Committee on Computer Architecture ♦ IEEE Computer Society
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1968
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Dynamic memories, memory architecture, perfect shuffle, permutation network, shift-register memories.
Abstract Aho and Ullman have proposed an access mechanism for dynamic memories by which each item of a block after the first two can be accessed in a single step. Recently, this organization has been enhanced by Stone, whose memory scheme allows, on the average, random access in 1.5 log2 n steps; whereas, in the case of a sequential access, a single step is required for each item after the first. However, both methods can only be used for memories of size n = 2k - 1. We generalize Stone's technique in order to eliminate this severe restriction. The very large number of solutions that can be obtained for each memory size implies that an optimization procedure is valuable if the cost constraints of a particular implementation are known.
Description Author affiliation :: Institut de Recherché en Informatique et Systames Aléatoires (IRISA)
ISSN 00189340
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1977-09-01
Publisher Place U.S.A.
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Volume Number C-26
Issue Number 9
Size (in Bytes) 3.59 MB
Page Count 9
Starting Page 847
Ending Page 855


Source: IEEE Xplore Digital Library