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Author Shi, C.-J.R. ♦ Xiang-Dong Tan
Sponsorship IEEE Council on Electronic Design Automation ♦ IEEE Circuits and Systems Society
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1982
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science ♦ Natural sciences & mathematics ♦ Physics ♦ Electricity & electronics
Subject Keyword Analog circuits ♦ Circuit simulation ♦ Numerical simulation ♦ Algorithm design and analysis ♦ Circuit analysis ♦ Frequency ♦ Performance analysis ♦ Data structures ♦ Boolean functions ♦ SPICE
Abstract Symbolic analysis has many applications in the design of analog circuits. Existing approaches rely on two forms of symbolic-expression representation: expanded sum-of-product form and arbitrarily nested form. Expanded form suffers the problem that the number of product terms grows exponentially with the size of a circuit. Nested form is neither canonical nor amenable to symbolic manipulation. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. It consists of representing the symbolic determinant of a circuit matrix by a graph-called a determinant decision diagram (DDD)-and performing symbolic analysis by graph manipulations. We show that DDD construction, as well as many symbolic analysis algorithms, takes time almost linear in the number of DDD vertices. We describe an efficient DDD-vertex ordering heuristic and prove that it is optimum for ladder-structured circuits. For practical analog circuits, the numbers of DDD vertices are several orders of magnitude less than the numbers of product terms. The algorithms have been implemented and compared respectively to symbolic analyzers ISAAC and Maple-V in generating the expanded sum-of-product expressions, and SCAPP in generating the nested sequences of expressions.
Description Author affiliation :: Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
ISSN 02780070
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2000-01-01
Publisher Place U.S.A.
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Volume Number 19
Issue Number 1
Size (in Bytes) 366.60 kB
Page Count 18
Starting Page 1
Ending Page 18

Source: IEEE Xplore Digital Library