Access Restriction

Author Ghofrani, Amirali ♦ lastras-montao, Miguel-angel ♦ Gaba, Siddharth ♦ Payvand, Melika ♦ Lu, Wei ♦ Theogarajan, Luke ♦ Cheng, Kwang-Ting
Source ACM Digital Library
Content type Text
Publisher Association for Computing Machinery (ACM)
File Format PDF
Copyright Year ©2015
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Access-Transistor-Free ♦ Adaptive Write Scheme ♦ Leakage-Current Filtering ♦ Low-Power ♦ March Algorithm ♦ Memory Testing ♦ Memristive Crossbar ♦ Memristor ♦ Online Resistance Monitoring ♦ ReRAM ♦ Variation-Aware Design
Abstract Recent advances in access-transistor-free memristive crossbars have demonstrated the potential of memristor arrays as high-density and ultra-low-power memory. However, with considerable variations in the write-time characteristics of individual memristors, conventional fixed-pulse write schemes cannot guarantee reliable completion of the write operations and waste significant amount of energy. We propose an adaptive write scheme that adaptively adjusts the write pulses to address such variations in memristive arrays, resulting in 7×--11× average energy saving in our case studies. Our scheme embeds an online monitor to detect the completion of a write operation and takes into account the parasitic effect of line-shared devices in access-transistor-free crossbars. This feature also helps shorten the test time of memory march algorithms by eliminating the need of a verifying read right after a write, which is commonly employed in the test sequences of march algorithms.
ISSN 15504832
Age Range 18 to 22 years ♦ above 22 year
Educational Use Research
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2015-08-03
Publisher Place New York
e-ISSN 15504840
Journal ACM Journal on Emerging Technologies in Computing Systems (JETC)
Volume Number 12
Issue Number 1
Page Count 18
Starting Page 1
Ending Page 18

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Source: ACM Digital Library