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Author Burnett, G. J. ♦ Coffman, E. G.
Source ACM Digital Library
Content type Text
Publisher Association for Computing Machinery (ACM)
File Format PDF
Language English
Subject Keyword Memory performance analysis ♦ Simulation ♦ Interleaved memory systems ♦ Modular memory systems ♦ Conflict buffer ♦ Monte carlo simulation ♦ Blockage buffer
Abstract A model of interleaved memory systems is presented, and the analysis of the model by Monte Carlo simulation is discussed. The simulations investigate the performance of various system structures, i.e. schemes for sending instruction and data requests to the memory system. Performance is measured by determining the distribution of the number of memory modules in operation during a memory cycle.An important observation from these investigations is that separately grouping instruction and data requests for memory can substantially increase the average number of memory modules in operation during a memory cycle. Results of the simulations and an analytical study are displayed for various system structures.
Description Affiliation: Index Systems,Inc., Cambridge, MA (Burnett, G. J.) || Pennsylvania State Univ., University Park (Coffman, E. G.)
Age Range 18 to 22 years ♦ above 22 year
Educational Use Research
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2005-08-01
Publisher Place New York
Journal Communications of the ACM (CACM)
Volume Number 18
Issue Number 2
Page Count 5
Starting Page 91
Ending Page 95


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Source: ACM Digital Library