|Author||Ibbett, R. N. ♦ Capon, P. C.|
|Source||ACM Digital Library|
|Publisher||Association for Computing Machinery (ACM)|
|Subject Keyword||Associative storage ♦ Architecture ♦ Virtual storage ♦ Instruction set ♦ Instruction buffering ♦ Computer complex ♦ Descriptor ♦ Function queue ♦ Naming ♦ Pipeline|
|Abstract||Following a brief outline of the background of the MU5 project, the aims and ideas for MU5 are discussed. A description is then given of the instruction set, which includes a number of features conducive to the production of efficient compiled code from high-level language source programs. The design of the processor is then traced from the initial ideas for an associatively addressed “name store” to the final multistage pipeline structure involving a prediction mechanism for instruction prefetching and a function queue for array element accessing. An overall view of the complete MU5 complex is presented together with a brief indication of its performance.|
|Description||Affiliation: Univ. of Manchester, Manchester, UK (Ibbett, R. N.; Capon, P. C.)|
|Age Range||18 to 22 years ♦ above 22 year|
|Education Level||UG and PG|
|Learning Resource Type||Article|
|Publisher Place||New York|
|Journal||Communications of the ACM (CACM)|
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