Access Restriction

Author Smith, J. Douglas
Source CiteSeerX
Content type Text
File Format PDF
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Adaptive Computing Environment ♦ Reconfigurable Hardware ♦ Software Function ♦ Local Data Memory ♦ Xilinx Xc4013 Fpgas ♦ Reconfigurable Computer ♦ Reconfigurable Hardware System ♦ Race System ♦ Fpga Configuration ♦ Reconfigurable Computing ♦ Detailed Hardware Knowledge ♦ Local Configuration Memory ♦ Field-programmable Gate Array ♦ Design Automation Laboratory ♦ Logic Gate
Abstract The Reconfigurable and Adaptive Computing Environment, or RACE, is a reconfigurable computer that has been developed in the Design Automation Laboratory at the University of Cincinnati. RACE was developed to facilitate any type of reconfigurable computing. Reconfigurable computing can be thought of as having the ability to repeatedly perform applications on a reconfigurable hardware system. Such reconfigurable hardware has been made possible by the advent of FPGAs, or Field-Programmable Gate Arrays. The RACE system has five Xilinx XC4013 FPGAs, one of which acts as a controller, which provide approximately 52,000 logic gates for computing. Furthermore, each FPGA has 128KB of local data memory and 64KB of local configuration memory, which is used to store FPGA configurations. RACE was designed to make reconfigurable computing easy to use so a library of software functions have been developed to control the reconfigurable hardware without detailed hardware knowledge of RACE. Likewise, im...
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study
Publisher Date 1997-01-01