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Author Togawa, Nozomu ♦ Yanagisawa, Masao ♦ Fan, Trans. ♦ Systemsin, Workshopon Circuitsan ♦ Signal, Indigital
Source CiteSeerX
Content type Text
File Format PDF
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Digital Signal Processor Core ♦ Hardware Software Cosynthesis System ♦ Register File ♦ Processor Core ♦ Hardwarel Op Unit ♦ Object Code ♦ Software Environment ♦ Mulclln Functional Unit ♦ Hardware Description ♦ Registerfilis Given Anappl9 ♦ Synthesized Processor Core
Abstract This paper proposes a hardware/software cosynthesis system fordigital signal processor cores with two types of registerfilis Given anappl9/1878 program and its data, the system synthesizes a hardware description of a processor core, an object code running on the processor core, and software environments. A synthesized processor core can be composed of a processor kernel mul7HH7 data memory buses, hardwarel op units, addressing units, and mulCLLN functional units. Furthermore it can have two types of registerfili
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study
Learning Resource Type Article
Publisher Date 2000-01-01