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Author Azampanah, Sanaz ♦ Esk, Azadeh ♦ Khademzadeh, Ahmad ♦ Karimi, Fathollah
Source CiteSeerX
Content type Text
File Format PDF
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Application Specific ♦ Traffic-aware Selection Strategy ♦ Adaptive Routing Algorithm ♦ Selection Strategy ♦ Noc Performance ♦ Promising Solution ♦ Algorithm Improves Average Delay ♦ Silicon Layer ♦ Design Complexity ♦ Final Output Channel ♦ Admissible Output Channel ♦ Selection Function ♦ Experimental Result ♦ Novel Selection Strategy Latex ♦ Three-dimensional Stacking ♦ Traffic Load
Abstract Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). The use of Networks on Chips (NoCs) to connect components in a 3D chip is a necessity. NoC performance largely depends on the underlying deadlock-free and efficient routing algorithm. In this paper a novel selection strategy LATEX 1, is proposed that can be used with any adaptive routing algorithm for specified applications on 2D or 3D topologies. The selection function, which decides the final output channel when a set of admissible output channels exist, is essential for an adaptive routing algorithm. The objective of the proposed selection strategy is to efficiently balance traffic load and reach better performance. Experimental results show that the proposed selection strategy applied to routing algorithm improves average delay and throughput.
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study
Learning Resource Type Article