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Author Kim, Dusung ♦ Gomez-Prado, Daniel ♦ Yang, Seiyang ♦ Ciesielski, Maciej
Source CiteSeerX
Content type Text
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Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Abstract This paper addresses the problem of computing relationship between the states of two designs, specification and implementation. The problem is considered here in the context of temporal parallel simulation, where state matching is required to determine the initial values of registers used as starting points for individual simulation runs. This problem is particularly challenging if the implementation design is obtained from the specification design by a series of retiming and re-synthesis transformations. We show that the problem can be solved efficiently by modifying inductive techniques of ABC for computing signal correspondence. In this paper, the state matching problem is considered in the context of Temporal Parallel Simulation (TPSim) [2], which combines formal methods with simulation-based validation. Unlike other hybrid validation techniques [3, 4], which concentrate on increasing the simulation coverage, this approach significantly improves efficiency and the overall performances of both functional and timing simulation. The next section briefly reviews the basic concept of temporal parallel simulation.
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study
Learning Resource Type Article