Thumbnail
Access Restriction
Open

Author Gjessing, Stein ♦ Krogdahl, Stein ♦ Munthe-Kaas, Ellen
Source CiteSeerX
Content type Text
File Format PDF
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Consistent List System ♦ Sci Cache Coherence ♦ Coherent Cache System ♦ Background Sci Scalable Coherent Interface ♦ Ieee Standard ♦ Structure Sci-like Protocol ♦ Top Layer ♦ Fast Network ♦ Formal Specification ♦ Processor Node ♦ Local Cac ♦ Bus Ment ♦ Cache Data ♦ Good Performance ♦ Bottom Layer ♦ Great Extent ♦ Sci Scalable Coherent Interface
Description SCI -- Scalable Coherent Interface -- is the name of a bus that an IEEE working group is defining in order for it to be an IEEE standard (P1596). The bus is scalable, meaning that up to 64 000 processor-, memory- or I/O-nodes can interface the bus and still get good performance. The memory can be cached by the processor nodes, and the caches will be coherent. A fast network connects the nodes, and protocols are defined in order to exchange cache data. This paper gives an overview of the problems involved in the SCI-work, and in addition it sketches a way to structure SCI-like protocols so that they will consist of two layers that to a great extent can be described, understood, verified and programmed separately. The bottom layer is a consistent list system, and the top layer is the additions necessary to make this into a coherent cache system. 1 Background SCI -- Scalable Coherent Interface -- is the name of a bus ment for connecting a number of processors, each with their local cac...
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study
Learning Resource Type Article
Publisher Date 1989-01-01
Publisher Institution Proc. NIK