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Author Kim, Jintae ♦ Lee, Jaeseo ♦ Vandenberghe, Lieven ♦ Yang, Chih-Kong Ken
Source CiteSeerX
Content type Text
File Format PDF
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Selected Case Gp ♦ Gp Optimization ♦ Passive Device Model ♦ On-chip Spiral Inductor Design ♦ Major Source ♦ Simple Method ♦ Bias Constraint ♦ Modeling Error ♦ Propose Several Method ♦ Inherent Error ♦ Two-stage Operational Amplifier ♦ Robust Design ♦ Gp Device Model ♦ Function Fitting ♦ Analog Circuit Design Optimization ♦ Nonconvex Constraint ♦ Presented Idea
Description We present techniques for improving the accuracy of geometric-programming (GP) based analog circuit design optimization. We describe major sources of discrepancies between the results from optimization and simulation, and propose several methods to reduce the error. Device modeling based on convex piecewise-linear (PWL) function fitting is introduced to create accurate active and passive device models. We also show that in selected cases GP can enable nonconvex constraints such as bias constraints using monotonicity, which help reduce the error. Lastly, we suggest a simple method to take the modeling error into account in GP optimization, which results in a robust design over the inherent errors in GP device models. Two-stage operational amplifier and on-chip spiral inductor designs are given as examples to demonstrate the presented ideas.
In Proceedings of the IEEE International Conference on Computer Aided Design
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study
Learning Resource Type Article
Publisher Date 2004-01-01