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Author Rajesh, C. ♦ Murthy, A. Sreenivasa
Source CiteSeerX
Content type Text
File Format PDF
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Viterbi Decoder ♦ Vhdl Implementation ♦ Efficient Viterbi Decoder ♦ Performance Characteristic ♦ Update Method ♦ Register-exchange Method ♦ Different Type ♦ Behavioural Description ♦ Specific Hardware Component ♦ Logic Synthesis ♦ Gate Level Circuit ♦ Selective Update ♦ Area Consumption ♦ Selective Update Method ♦ Particular Design ♦ Communication Application ♦ Registerexchange Approach ♦ Experimental Result ♦ Wide Variety ♦ Power Consumption
Abstract Viterbi decoders are used in wide variety of communication applications. In this paper, we focus on different types of VHDL implementations of Viterbi decoder. The two approaches of Implementation of Viterbi decoder are registerexchange approach and trace back approach. There are two methods in trace back approach i.e. shift update and selective update. The behaviour of a Viterbi decoder is described in VHDL. A gate level circuit was obtained from the behavioural description through logic synthesis. We compared the performance characteristics of all approaches in terms of speed, area consumption, power and specific hardware components used by that particular design. Our experimental results show that the performance characteristics of selective update method is better compared to registerexchange and shift update method in terms of area and power consumption. In contrast, the performance characteristics of register-exchange method is better compared to selective update and shift update method in terms of speed.
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study