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Author Mehra, Renu ♦ Rabaey, Jan
Source CiteSeerX
Content type Text
File Format PDF
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword Power Estimation ♦ High Level Design Parameter ♦ Introduction High Level Synthesis ♦ Design Space ♦ Considerable Interest ♦ Exploration Tool ♦ Average Error ♦ Synthesis System ♦ Power Optimization ♦ Stochastic Estimation Technique ♦ Several Different Level ♦ Present Comparison ♦ Architectural Level Power Estimation Tool ♦ Behavioral Level Power Estimation ♦ Recent Year ♦ Computational Structure ♦ First Step Towards ♦ Performance Metric ♦ Behavioral Level Description ♦ Power Minimization Technique ♦ Power Consumption
Description : This paper addresses the problem of estimating, from a behavioral level description, the power consumed by a design. We propose a combination of analytical and stochastic estimation techniques and present comparisons with an architectural level power estimation tool. Average errors of about 20% have been obtained. Based on these estimates, an exploration tool, Explore, has been built to quickly scan the design space and provide estimates of performance metrics such as area and power as guidelines for selection of computational structures and high level design parameters. 1. Introduction High level synthesis has aroused considerable interest in the recent years. While a lot of effort has been put into synthesis for speed and area, power optimization has been explored only recently. Estimation of power consumption of a design is the first step towards integrating power minimization techniques into any synthesis system. Work on power estimation has been done at several different level...
in Proc. Int. Wkshp. Low Power Design
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study
Learning Resource Type Article
Publisher Date 1994-01-01