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Author Darabiha, Ahmad ♦ Carusone, Anthony Chan ♦ Kschischang, Frank R.
Source CiteSeerX
Content type Text
File Format PDF
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Subject Keyword New Check Update Rule ♦ Gear Shift ♦ Wordlength-programmable Ldpc Decoding ♦ Rs-based Ldpc Decoder ♦ Efficient Implementation ♦ Fully-parallel Low-density Parity-check Decoder ♦ Interconnect Complexity ♦ Absolute Minimum ♦ Bit-serial Ldpc ♦ New Approximation ♦ Fpga-based Ldpc Decoder ♦ Bit-serial Approximate Min-sum Ldpc Decoder ♦ Bit-serial Decoding ♦ Check Update Function ♦ Min-sum Decoding Algorithm
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research
Education Level UG and PG ♦ Career/Technical Study
Learning Resource Type Article
Publisher Date 2006-01-01
Publisher Institution implementation,” in International Symposium on Circuits and Systems